SIMULATOR=verilator
SIMU_PARAM=-I$(SIMU_INCDIR) -I$(UVM_INCDIR)
SYNTHESIZER=qflow synthesize
HIERARCHY_FILE=$(REPORT_DIR)/hierarchy.rpt

YSYX_DIR=../oscpu-framework
PROJECT_NAME=vostok564
BUILD_PARAM=-e $(PROJECT_NAME) -d -b -s -a "-i inst_diff.bin --dump-wave -b 0" -m "EMU_TRACE=1" -w
MANUAL_INCFILE=$(TB_DIR)/DIFFTEST.INC #ATTENTION: Due to iverilog can't recognize 

RTL_DIR = ./RTL
TB_DIR=./SIMRTL
ASIC_PDK=osu018
OBJ_DIR=./temp
REPORT_DIR=./temp
INCLUDE_DIR=./RTL
SIMU_INCDIR=./SIMRTL
#UVM_INCDIR=./sim/uvm_library/src
TOP_MODULE=PRV564_Kernel
TB_MODULE=SimTop
SHOW_WAVEFORM=TRUE
